1. Field of the Invention
The present invention relates to a semiconductor lead frame, and more particularly, to a semiconductor lead frame having an improved multi-layered plating layer coated on the upper surface of a substrate, and a manufacturing method thereof.
2. Description of the Related Art
A general semiconductor lead frame is manufactured by a stamping process or an etching process. In a stamping process, a lead frame is manufactured by stamping an intermittently-transferred thin plate material with a press, which is suitable for mass production. The etching process, for forming a product by etching a part of a material using a chemical, is usually adopted to small scale production.
During a process for manufacturing a semiconductor package, a die pad and an inner lead are plated with a metal material to improve characteristics of wire bonding between a semiconductor chip and an inner lead and properties of the die pad. Also, a lead-tin plating layer can be coated on a predetermined portion of an outer lead in order to improve its soldering property. However, the above process is a wet plating process, conducted after the semiconductor packaging is completed, thus reducing the reliability of the product subject to such a process. Also, it is difficult to perform in an in-line process.
In order to overcome such problems, a pre-plated frame (PPF) method for forming a middle plating layer by coating a material, having good solder wettability, onto a substrate before the semiconductor packaging process occurs has been proposed. That is, referring to FIG. 1, a nickel plating layer 12 is formed on a metal substrate 11, and a palladium or palladium alloy layer 13 is coated on the nickel plating layer 12. The bottom surface of the substrate 11 is also coated with the same plating layers as above.
Here, the nickel plating layer 12 serves as a middle plating layer to decrease degradation of adhesiveness when the metal substrate 11 is plated with the palladium or palladium alloy layer 13. The palladium or palladium alloy layer 13 prevents surface oxidation of the nickel plating layer 12.
When these multiple plating layers are formed, the internal stress of the nickel plating layer 12 may be concentrated, and the nickel plating layer 12 may crack during a trimming or forming process when it has a significantly large thickness. Because of such crack generation, a copper element of the metal substrate 11 diffuses up to the surface of the palladium or palladium alloy layer 13, leading to galvanic corrosion. Therefore, the semiconductor lead frame has reduced anticorrosion properties. Also, since the palladium or palladium alloy layer 13 does not protect the nickel plating layer 12, the soldering wettability is reduced.